parallel memory
英 [ˈpærəlel ˈmeməri]
美 [ˈpærəlel ˈmeməri]
并行存储器
双语例句
- Research of Fast Commit and Highly Efficient Recovery Method for Parallel Main Memory Database
并行内存数据库快速事务提交与高效恢复方法研究 - This thesis presents a method to analyse source code to expose possible parallel memory accesses.
此外，这个方法可以延伸扩展成近似等向性设计，它是和现有的并联式机器人相似的。 - Parallel Memory System Based on Ray-casting Algorithm
基于Ray-casting算法的并行存储系统 - A Parallel Stream Memory Architecture for Heterogeneous Multi-core Processor
一种异构多核处理器的并行流存储结构 - Compared with the full parallel architecture, the memory cost of the designed processor decreases, thus the speed is higher than that of the SDF pipeline architecture.
该处理器内存资源消耗较并行结构有所减少，运算速度较单独的SDF流水线结构有所提高。 - A High Efficient Transaction Committing and Recovery Scheme for Parallel Main Memory Database Systems
一种高效的并行内存数据库事务提交与恢复技术 - Parallel computer of memory blocking research
内存分块并行计算机研究 - A Simple Method of Parallel Programming on Distributed Memory System
分布式系统并行编程的简单方法 - The program counter should belong to the storage device. The parallel computer of memory blocking can allow multiple memory units and performance units dynamically linking, therefore many programs can run together depend on synchronous clock.
将程序计数器归入存储单位的内存分块并行计算机，能够实现多个存储单位和多个执行单位的动态连接，依靠同步时钟，让多个程序一起执行。 - Parallel memory system and its band width analysis
并行主存系统及其频宽分析 - Research and Implementation of the Data Parallel Coprocessor Memory System
数据并行协处理器存储系统的研究与实现 - The parallel compiler in distributed memory systems should solve the problem of data distribution among lo-cal memories and the problem of communication optimization among processors.
分布存储系统的并行编译器需要解决各局部存储器之间数据分布问题和各处理机之间通信优化问题。 - BUFFER CAPACITY Experimental study of optical parallel cache memory arrays
光学并行高速缓冲存储列阵的实验研究 - It realized quick look imaging of decrease resolution 8 times with parallel process on memory shared 8 CPU SGI server.
运用并行处理，在8CPU内存共享的SGI服务器上实现了分辨率降低8倍的快视成像。 - A scheme of parallel or interleaved memory consisting of prime module memories
素数个模块的并行或交叉存储器实现方案 - The first part focuses on code generation and communication optimization of message-passing parallel program for distributed memory architecture.
第一部分以分布内存结构为目标，研究了并行化过程中的通信优化和消息传递类型并行程序自动生成问题。 - The new avionics contain high data-rate sensors, parallel processors and shared memory with high levels of integration.
第四代航空电子系统中包含了高度综合的传感器，并行处理器和共享存储器。 - Prom the point of its applications, using related method to process subsequence, and dynamic selecting recursion parameter, the improved algorithm and parallel algorithm on shared memory SIMD computer are discussed in this paper.
从应用的角度对子序列进行有关技术处理，并对递归参量进行动态选择，给出了线性选择算法的实用性改进，并对这一改进算法在共享存储的SIMD机器上给出了并行化。 - In massive parallel distributed shared memory multiprocessor, maximum reducing the remote memory access latencies is the key of improving the whole system performance.
在大规模并行分布式共享主存多处理机系统中，尽可能减少系统中远程访问时延，是提高系统整体性能的关键。 - By introducing parallel memory system, this paper analyzes its band width peculiarity.
本文在介绍并行主存系统交叉编址访问内存的基础上，分析了并行主存系统的频宽特性。 - In this paper the relationship between memory contention and the number of module in a parallel or interleaved memory generally used in a multiprocessor system is analysed and mathematical models of efficient memory bandwidth for 2n module and prime module are set up respectively.
本文对多处理机中通常使用的并行或交叉存储器，进行了模的个数对存储冲突的影响的分析，并建立了在模块数分别为2~n和素数时存储有效宽度的数学模型。 - In this paper the relationship between memory contention and ( a, M), the greatest common divisor of a and M, is investigated, where M is the number of parallel memory modules, and a is a constant increment of address.
本文论述了以增量a（常数）访问M个体组成的并行存储器时，存取碰头和（a，M）的关系，这里（a，M）表示a和M的最大公因数。 - This paper starts with parallel computer of distributed memory, educe two kinds of parallel programming models-message transferring model and data paralleling model.
本文从分布式存储的并行计算机入手，引出了它的两种并行编程模型消息传递模型和数据并行模型。 - A Parallel Memory Cache System and Its Implementation
一种并行内存缓冲系统及其实现技术 - Characteristics of GaAs/ AlGaAs Photonic Parallel Memory
GaAs／AlGaAs光子平行存贮器的性能 - Then, we design and implement a Shared by Heterogeneity Processor L2 Cache sub-system to exploit the extra parallelism and locality in stream application, and improve the off-chip memory bandwidth. These lead to a more completed parallel hierarchy stream memory system.
针对流应用中各种可用的并行性和局域性，我们设计并实现了由异构处理器共享的二级缓存子系统，并对片外存储层次进行改进，完善了原有的存储层次结构。 - The delay of accessing memory is affected not only by the restriction of hardware, but also by the parallel execution of memory accessing requests and the probability of bank conflicts.
对内存的访问延时除了受基础的硬件性能制约外，还受访存序列在Bank间的并行执行能力以及Bank上的冲突概率等因素的影响。 - The transplant of μ C/ OS-II in DSP system, the driver for peripheral based on the operation system and also the application software including parallel communications, Nand-Flash memory, LCD& keyboard control and motion control management. 4.
完成μC/OS-II实时多任务操作系统在DSP中的移植，外设驱动程序的编写，以及基于操作系统的应用程序设计。主要包括并口通讯，NANDFlash存储管理，液晶显示与键盘控制和运动控制管理等。 - The experimental results show that using parallel strategy can solve memory and efficiency problems well, and the assembly result become better without graph dividing.
实验结果表明，使用并行策略，很好地克服了存储和效率的问题，同时在不对图进行划分的情况下，获得了更好的拼接结果。 - On-Chip Memory is a key component of microprocessor. With the development of modern microprocessor, the arithmetic unit inside the processor core has more requirements to data parallel. Memory system has become the bottleneck which limited the increase performance of microprocessor.
存储器是微处理器内核中的关键部件，随着现代微处理器的发展，微处理器内核的运算部件对数据的并行性有了更高的要求，存储部件已经成为高性能微处理器提高性能的瓶颈。